Cristian Bob (AMIQ) leveraged the power of Python into a SystemVerilog testbench using a client-server architecture. The post How to Connect SystemVerilog with Python is a must-read if you use or plan to use Python along with SystemVerilog. It is natural to see Python infiltrating the verification world given it’s popularity (see TIOBE index) and its applications spectrum.
Mattew Ballance(Mentor, A Siemens Business) wrote a short guide on how to think about PSS when it comes to your own application: Selecting a Portable Stimulus Application Focal Point.
I’m a long time user of e-language so I regularly read TeamSpecman’s blog. This month they wrote about Concurrent Actions in Specman. The post describes first of and all of constructs, which resemble the SystemVerilog fork join/join_any constructs.
Given that functional verification is about 90% software and 10% “hardware”, I recommend this website. RefactoringGuru presents in a very friendly way how/when to refactor your code and design pattern concepts and recipes that can be leveraged in verification engineer’s day to day work.