This year the DVClub conference approached an interesting topic: Alternative Test Bench Architectures. For sure every company has its own way of building test bench architectures. Infineon has presented an architecture in which the Generation is decoupled from the Simulation phase for an IP test. The video presentation can be viewed over here. This architecture has been detailed even further in the second presentation called: ADAS IP Case Study: De-Coupled Generation and Simulation for Functional Verification
The SystemVerilog language has some pitfalls and not all of us are aware of them. I’ve encountered one particular pitfall in multiple projects. Thus, I’ve decided to raise the awareness of our community by sharing it in the following article: Gotcha: Calling Virtual Functions From SystemVerilog Class Constructor new() Method