SystemVerilog Archives - Page 19 of 27

SVAUnit 2.0 Release is Available

AMIQ is pleased to announce version 2.0 of the SVAUnit framework! Highlights of SVAUnit 2.0 release are: Support for sequence based scenarios Upgraded test setup API

AMIQ Consulting June 30, 2015 No Comments

Gotcha: Using “rand” Modifier for Object Handles is not enough!

SystemVerilog allows rand modifier to be used for object handles and the object will be randomized only if it is not null. The “gotcha” is

AMIQ Consulting May 25, 2015 No Comments

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SVAUnit 2.0 Release is Available

Recommended Articles – May 2015

Gotcha: Using “rand” Modifier for Object Handles is not enough!